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MICRO
2010
IEEE
140views Hardware» more  MICRO 2010»
13 years 2 months ago
Moneta: A High-Performance Storage Array Architecture for Next-Generation, Non-volatile Memories
Emerging non-volatile memory technologies such as phase change memory (PCM) promise to increase storage system performance by a wide margin relative to both conventional disks and ...
Adrian M. Caulfield, Arup De, Joel Coburn, Todor I...
APCSAC
2001
IEEE
13 years 8 months ago
High-Performance Extendable Instruction Set Computing
In this paper, a new architecture called the extendable instruction set computer (EISC) is introduced that addresses the issues of memory size and performance in embedded micropro...
Heui Lee, Paul Becket, Bill Appelbe
ISPAN
2000
IEEE
13 years 9 months ago
Versatile Processor Design for Efficiency and High Performance
We present new architectural concepts for uniprocessor designs that conform to the data-driven computation paradigm. Usage of our D2 -CPU (Data-Driven processor) follows the natura...
Sotirios G. Ziavras
INFOCOM
2008
IEEE
13 years 11 months ago
Peacock Hashing: Deterministic and Updatable Hashing for High Performance Networking
—Hash tables are extensively used in networking to implement data-structures that associate a set of keys to a set of values, as they provide O(1), query, insert and delete opera...
Sailesh Kumar, Jonathan S. Turner, Patrick Crowley
IPPS
2007
IEEE
13 years 11 months ago
Power, Performance, and Thermal Management for High-Performance Systems
In future high-performance systems it will be essential to balance often-conflicting objectives of performance, power, energy, and temperature under variable workload and environ...
Heather Hanson, Stephen W. Keckler, Karthick Rajam...