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ISCAS
2005
IEEE
143views Hardware» more  ISCAS 2005»
13 years 10 months ago
Design and FPGA implementation of a structure of evolutionary digital filters for hardware implementation
— In this paper, we design and implement an improved hardware-based evolutionary digital filter (EDF) version 2. The EDF is an adaptive digital filter which is controlled by ad...
Masahide Abe, Hiroki Arai, Masayuki Kawamata
CDES
2008
123views Hardware» more  CDES 2008»
13 years 6 months ago
R-tree: A Hardware Implementation
R-tree data structures are widely used in spatial databases to store, manage and manipulate spatial information. As the data volume of such databases is typically very large, the q...
Xiang Xiao, Tuo Shi, Pranav Vaidya, Jaehwan John L...
COMPUTING
2004
204views more  COMPUTING 2004»
13 years 4 months ago
Image Registration by a Regularized Gradient Flow. A Streaming Implementation in DX9 Graphics Hardware
The presented image registration method uses a regularized gradient flow to correlate the intensities in two images. Thereby, an energy functional is successively minimized by des...
Robert Strzodka, Marc Droske, Martin Rumpf
GECCO
2007
Springer
207views Optimization» more  GECCO 2007»
13 years 11 months ago
A data parallel approach to genetic programming using programmable graphics hardware
In recent years the computing power of graphics cards has increased significantly. Indeed, the growth in the computing power of these graphics cards is now several orders of magn...
Darren M. Chitty
FCCM
2006
IEEE
195views VLSI» more  FCCM 2006»
13 years 11 months ago
A Parallel Hardware Architecture for fast Gaussian Elimination over GF(2)
This paper presents a hardware-optimized variant of the well-known Gaussian elimination over GF(2) and its highly efficient implementation. The proposed hardware architecture, we...
Andrey Bogdanov, M. C. Mertens