10 search results - page 1 / 2 » How Does Resource Utilization Affect Fault Tolerance |
DFT
2000
IEEE
13 years 9 months ago
2000
IEEE
Many fault-tolerant architectures are based on the single-fault assumption, hence accumulation of dormant faults represents a potential reliability hazard. Based on the example of...
AGENTS
1999
Springer
13 years 9 months ago
1999
Springer
We describe the interface between a real-time resource allocation system with an AI planner in order to create fault-tolerant plans that are guaranteed to execute in hard real-tim...
CGO
2005
IEEE
13 years 10 months ago
2005
IEEE
To improve performance and reduce power, processor designers employ advances that shrink feature sizes, lower voltage levels, reduce noise margins, and increase clock rates. Howev...
DSD
2008
IEEE
13 years 11 months ago
2008
IEEE
In this paper, a methodology for generating VHDL descriptions of hardware checkers is presented. It is shown how the methodology can be used to generate on-line checkers of commun...
ICDCS
2011
IEEE
12 years 4 months ago
2011
IEEE
Many distributed software systems allow participation by large numbers of untrusted, potentially faulty components on an open network. As faults are inevitable in this setting, th...