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» ITOP: integrating timing optimization within placement
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ESTIMEDIA
2009
Springer
13 years 3 months ago
Optimal stack frame placement and transfer for energy reduction targeting embedded processors with scratch-pad memories
Abstract--Memory accesses are a major cause of energy consumption for embedded systems and the stack is a frequent target for data accesses. This paper presents a fully software te...
Lovic Gauthier, Tohru Ishihara
DAC
2007
ACM
14 years 7 months ago
IPR: An Integrated Placement and Routing Algorithm
Abstract-- In nanometer-scale VLSI technologies, several interconnect issues like routing congestion and interconnect delay have become the main concerns in placement. However, all...
Min Pan, Chris C. N. Chu
ERSA
2010
152views Hardware» more  ERSA 2010»
13 years 4 months ago
Persistent CAD for in-the-field Power Optimization
A major focus within the Integrated Chip (IC) industry is reducing power consumption of devices. In this paper, we explore the idea of persistent CAD algorithms that constantly imp...
Peter Jamieson
ASPDAC
2007
ACM
98views Hardware» more  ASPDAC 2007»
13 years 10 months ago
Fast Analytic Placement using Minimum Cost Flow
Many current integrated circuits designs, such as those released for the ISPD2005[14] placement contest, are extremely large and can contain a great deal of white space. These new...
Ameya R. Agnihotri, Patrick H. Madden
ICCAD
2008
IEEE
223views Hardware» more  ICCAD 2008»
14 years 2 months ago
Decoupling capacitance allocation for timing with statistical noise model and timing analysis
Abstract— This paper presents an allocation method of decoupling capacitance that explicitly considers timing. We have found and focused that decap does not necessarily improve a...
Takashi Enami, Masanori Hashimoto, Takashi Sato