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» Impact of Self-Heating in Wire Interconnection on Timing
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ISSS
1998
IEEE
96views Hardware» more  ISSS 1998»
13 years 9 months ago
Fine Grain Incremental Rescheduling Via Architectural Retiming
With the decreasing feature sizes during VLSI fabrication and the dominance of interconnect delay over that of gates, control logic and wiring no longer have a negligible impact o...
Soha Hassoun
ICCD
2004
IEEE
135views Hardware» more  ICCD 2004»
14 years 1 months ago
Design Methodologies and Architecture Solutions for High-Performance Interconnects
In Deep Sub-Micron (DSM) technologies, interconnects play a crucial role in the correct functionality and largely impact the performance of complex System-on-Chip (SoC) designs. F...
Davide Pandini, Cristiano Forzan, Livio Baldi
PDP
2010
IEEE
13 years 9 months ago
Energy-Efficient Hardware Prefetching for CMPs Using Heterogeneous Interconnects
In the last years high performance processor designs have evolved toward Chip-Multiprocessor (CMP) architectures that implement multiple processing cores on a single die. As the nu...
Antonio Flores, Juan L. Aragón, Manuel E. A...
ISPASS
2009
IEEE
13 years 11 months ago
GARNET: A detailed on-chip network model inside a full-system simulator
Until very recently, microprocessor designs were computation-centric. On-chip communication was frequently ignored. This was because of fast, single-cycle on-chip communication. T...
Niket Agarwal, Tushar Krishna, Li-Shiuan Peh, Nira...
CSREAPSC
2006
13 years 6 months ago
Ubiquitous Security: Privacy versus Protection
- In the ambient computing future, security promises to be the foundational design feature that allows pervasive systems to protect personal information privacy. As fledgling perva...
Timothy Buennemeyer, Randolph Marchany, Joseph G. ...