Sciweavers

Share
44 search results - page 1 / 9
» Impact of hardware emulation on the verification quality imp...
Sort
View
VLSI
2007
Springer
9 years 6 months ago
Impact of hardware emulation on the verification quality improvement
— Software simulation remains the most used method for VHDL RTL functional verification. The functional verification process essentially consists of two parts. The first one is t...
Youssef Serrestou, Vincent Beroulle, Chantal Robac...
EURODAC
1995
IEEE
156views VHDL» more  EURODAC 1995»
9 years 3 months ago
VHDL quality: synthesizability, complexity and efficiency evaluation
With VHDL models increasing their size, it becomes more important to assure the quality of these descriptions in order to improve simulation performances, to make project maintain...
M. Mastretti
ASPDAC
2001
ACM
126views Hardware» more  ASPDAC 2001»
9 years 3 months ago
A new partitioning scheme for improvement of image computation
Abstract-- Image computation is the core operation for optimization and formal verification of sequential systems like controllers or protocols. State exploration techniques based ...
Christoph Meinel, Christian Stangier
DATE
2006
IEEE
108views Hardware» more  DATE 2006»
9 years 6 months ago
Software-friendly HW/SW co-simulation: an industrial case study
This paper proposes a novel HW/SW co-simulation approach that minimizes the impact on software designers. We propose a SystemC-based system that enables the software team to test ...
Juanjo Noguera, Luis Baldez, Narcis Simon, Lluis A...
ECBS
2007
IEEE
155views Hardware» more  ECBS 2007»
9 years 4 months ago
Evaluating the Quality of Models Extracted from Embedded Real-Time Software
Due to the high cost of modeling, model-based techniques are yet to make their impact in the embedded systems industry, which still persist on maintaining code-oriented legacy sys...
Joel Huselius, Johan Kraft, Hans Hansson, Sasikuma...
books