40 search results - page 1 / 8 » Impact of hardware emulation on the verification quality imp... |
VLSI
2007
Springer
13 years 10 months ago
2007
Springer
— Software simulation remains the most used method for VHDL RTL functional verification. The functional verification process essentially consists of two parts. The first one is t...
EURODAC
1995
IEEE
13 years 8 months ago
1995
IEEE
With VHDL models increasing their size, it becomes more important to assure the quality of these descriptions in order to improve simulation performances, to make project maintain...
ASPDAC
2001
ACM
13 years 8 months ago
2001
ACM
Abstract-- Image computation is the core operation for optimization and formal verification of sequential systems like controllers or protocols. State exploration techniques based ...
DATE
2006
IEEE
13 years 10 months ago
2006
IEEE
This paper proposes a novel HW/SW co-simulation approach that minimizes the impact on software designers. We propose a SystemC-based system that enables the software team to test ...
ECBS
2007
IEEE
13 years 8 months ago
2007
IEEE
Due to the high cost of modeling, model-based techniques are yet to make their impact in the embedded systems industry, which still persist on maintaining code-oriented legacy sys...