16 search results - page 2 / 4 » Implementing DSP Algorithms with On-Chip Networks |
SBACPAD
2007
IEEE
13 years 11 months ago
2007
IEEE
In this paper, an adaptive wormhole router for a flexible on-chip interconnection network is proposed and implemented for a Chip-Multi Processor (CMP). It adopts a wormhole switc...
ICCAD
2004
IEEE
14 years 2 months ago
2004
IEEE
Linear DSP kernels such as transforms and filters are comprised exclusively of additions and multiplications by constants. These multiplications may be realized as networks of ad...
RTSS
2007
IEEE
13 years 11 months ago
2007
IEEE
Wireless sensor network (WSN) applications have been studied extensively in recent years. Such applications involve resource-limited embedded sensor nodes that have small size and...
TVLSI
2008
13 years 5 months ago
2008
Reconfigurable hardware has become a well-accepted option for implementing digital signal processing (DSP). Traditional devices such as field-programmable gate arrays offer good fi...
FPGA
2004
ACM
13 years 10 months ago
2004
ACM
In this paper, an efficient implementation of a high performance coarse-grain reconfigurable data-path on a mixed-granularity reconfigurable platform is presented. It consists of ...