1688 search results - page 3 / 338 » Implementing Optimizations at Decode Time |
GLOBECOM
2006
IEEE
13 years 10 months ago
2006
IEEE
— We present a field programmable gate array (FPGA) implementation of a turbo-like decoder for a serially concatenated pulse-position modulation (SCPPM) code. NASA developed thi...
ICMCS
2005
IEEE
13 years 10 months ago
2005
IEEE
This paper presents the optimization techniques and results of implementing the H.264/AVC baseline profile decoder in software on the Sandblaster digital signal processor. It has ...
IPPS
2008
IEEE
13 years 11 months ago
2008
IEEE
The Sony-Toshiba-IBM Cell Broadband Engine is a heterogeneous multicore architecture that consists of a traditional microprocessor (PPE) with eight SIMD coprocessing units (SPEs) ...
ISCAS
2005
IEEE
13 years 10 months ago
2005
IEEE
Abstract— Time encoding is a mechanism for representing the information contained in a continuous time, bandlimited, analog signal as the zero-crossings of a binary signal. Time ...
SIPS
2006
IEEE
13 years 10 months ago
2006
IEEE
Although many stopping methods of iterative decoding have been discussed in the literatures extensively, many of them only focus on the solvable decoding. In this paper, we propos...