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ARCS
2005
Springer
13 years 10 months ago
Implementing core tasks of JPEG2000 Encoder on the Dynamically Reconfigurable Processor
Katsuaki Deguchi, Shohei Abe, Masayasu Suzuki, Ken...
DATE
2009
IEEE
149views Hardware» more  DATE 2009»
13 years 11 months ago
An ILP formulation for task mapping and scheduling on multi-core architectures
Multi-core architectures are increasingly being adopted in the design of emerging complex embedded systems. Key issues of designing such systems are on-chip interconnects, memory a...
Ying Yi, Wei Han, Xin Zhao, Ahmet T. Erdogan, Tugh...
MAM
2007
157views more  MAM 2007»
13 years 4 months ago
Executing large algorithms on low-capacity FPGAs using flowpath partitioning and runtime reconfiguration
This paper describes a new method of executing a software program on an FPGA for embedded systems. Rather than combine reconfigurable logic with a microprocessor core, this method...
Darrin M. Hanna, Michael DuChene