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ECRTS
2002
IEEE
13 years 9 months ago
Weakly Hard Real-time Constraints on Controller Area Network
For priority based buses such as CAN, worst case response time analysis is able to determine whether messages always meet their deadlines. This can include system models with boun...
Ian Broster, Guillem Bernat, Alan Burns
DATE
2009
IEEE
119views Hardware» more  DATE 2009»
13 years 11 months ago
Improved worst-case response-time calculations by upper-bound conditions
Fast real-time feasibility tests and analysis algorithms are necessary for a high acceptance of the formal techniques by industrial software engineers. This paper presents a possi...
Victor Pollex, Steffen Kollmann, Karsten Albers, F...
ICCAD
2000
IEEE
169views Hardware» more  ICCAD 2000»
13 years 9 months ago
Transistor-Level Timing Analysis Using Embedded Simulation
A high accuracy system for transistor-level static timing analysis is presented. Accurate static timing verification requires that individual gate and interconnect delays be accu...
Pawan Kulshreshtha, Robert Palermo, Mohammad Morta...
CCS
2006
ACM
13 years 6 months ago
Dynamic rule-ordering optimization for high-speed firewall filtering
Packet filtering plays a critical role in many of the current high speed network technologies such as firewalls and IPSec devices. The optimization of firewall policies is critica...
Hazem Hamed, Ehab Al-Shaer
RTSS
2006
IEEE
13 years 10 months ago
Tightening the Bounds on Feasible Preemption Points
Caches have become invaluable for higher-end architectures to hide, in part, the increasing gap between processor speed and memory access times. While the effect of caches on timi...
Harini Ramaprasad, Frank Mueller