38 search results - page 2 / 8 » Improving FPGA Performance and Area Using an Adaptive Logic ... |
FPGA
2006
ACM
13 years 9 months ago
2006
ACM
The performance benefits of a monolithically stacked 3DFPGA, whereby the programming overhead of an FPGA is stacked on top of a standard CMOS layer containing the logic blocks and...
FCCM
2002
IEEE
13 years 10 months ago
2002
IEEE
This paper explores the implications of integrating flexible module generation into a compiler for FPGAs. The objective is to improve the programmabilityof FPGAs, or in other wor...
ICCAD
2007
IEEE
14 years 2 months ago
2007
IEEE
— Small gates, such as AND2, XOR2 and MUX2, have been mixed with lookup tables (LUTs) inside the programmable logic block (PLB) to reduce area and power and increase performance ...
FPGA
2006
ACM
13 years 9 months ago
2006
ACM
Many System-on-a-Chip devices would benefit from the inclusion of reprogrammable logic on the silicon die, as it can add general computing ability, provide run-time reconfigurabil...
FPGA
2006
ACM
13 years 9 months ago
2006
ACM
Abstract--Field-programmable gate-array (FPGA) logic synthesis and technology mapping have been studied extensively over the past 15 years. However, progress within the last few ye...