31 search results - page 5 / 7 » Improving Geographical Locality of Data for Shared Memory Im... |
IJHPCA
2010
13 years 4 months ago
2010
Sparse matrix operations achieve only small fractions of peak CPU speeds because of the use of specialized, indexbased matrix representations, which degrade cache utilization by i...
SC
1995
ACM
13 years 9 months ago
1995
ACM
Given the large communication overheads characteristic of modern parallel machines, optimizations that eliminate, hide or parallelize communication may improve the performance of ...
MICRO
2010
IEEE
13 years 3 months ago
2010
IEEE
Most Hardware Transactional Memory (HTM) implementations choose fixed version and conflict management policies at design time. While eager HTM systems store transactional state in-...
DSL
1997
13 years 7 months ago
1997
In this paper we describe our experience with Teapot [7], a domain-specific language for writing cache coherence protocols. Cache coherence is of concern when parallel and distrib...
ISCA
2006
IEEE
13 years 12 months ago
2006
IEEE
This paper presents CMP Cooperative Caching, a unified framework to manage a CMP’s aggregate on-chip cache resources. Cooperative caching combines the strengths of private and ...