68 search results - page 2 / 14 » Improving Memory Subsystem Performance Using ViVA: Virtual V... |
TVLSI
2008
13 years 5 months ago
2008
As technology scales, more sophisticated fabrication processes cause variations in many different parameters in the device. These variations could severely affect the performance o...
ICPP
2008
IEEE
14 years 5 days ago
2008
IEEE
Abstract—The Sparse Matrix-Vector Multiplication kernel exhibits limited potential for taking advantage of modern shared memory architectures due to its large memory bandwidth re...
IPPS
2007
IEEE
14 years 1 days ago
2007
IEEE
— We consider memory subsystem optimizations for improving the performance of sparse scientific computation while reducing the power consumed by the CPU and memory. We first co...
ICCAD
2004
IEEE
14 years 2 months ago
2004
IEEE
Abstract— High-level synthesis (HLS) of memory-intensive applications has featured several innovations in terms of enhancements made to the basic memory organization and data lay...
ICPP
2009
IEEE
14 years 12 days ago
2009
IEEE
—Sparse Matrix-Vector multiplication (SpMV) is a very challenging computational kernel, since its performance depends greatly on both the input matrix and the underlying architec...