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FPL
2009
Springer
86views Hardware» more  FPL 2009»
13 years 9 months ago
Improving logic density through synthesis-inspired architecture
We leverage properties of the logic synthesis netlist to define both a logic element architecture and an associated technology mapping algorithm that together provide improved lo...
Jason Helge Anderson, Qiang Wang
FPGA
2005
ACM
90views FPGA» more  FPGA 2005»
13 years 10 months ago
Using bus-based connections to improve field-programmable gate array density for implementing datapath circuits
Abstract—As the logic capacity of field-programmable gate arrays (FPGAs) increases, they are increasingly being used to implement large arithmetic-intensive applications, which ...
Andy Gean Ye, Jonathan Rose
FPGA
1999
ACM
115views FPGA» more  FPGA 1999»
13 years 9 months ago
Using Cluster-Based Logic Blocks and Timing-Driven Packing to Improve FPGA Speed and Density
In this paper, we investigate the speed and area-efficiency of FPGAs employing “logic clusters” containing multiple LUTs and registers as their logic block. We introduce a ne...
Alexander Marquardt, Vaughn Betz, Jonathan Rose
DAC
2009
ACM
14 years 5 months ago
Improving STT MRAM storage density through smaller-than-worst-case transistor sizing
This paper presents a technique to improve the storage density of spin-torque transfer (STT) magnetoresistive random access memory (MRAM) in the presence of significant magnetic t...
Wei Xu, Yiran Chen, Xiaobin Wang, Tong Zhang
MIDDLEWARE
2005
Springer
13 years 10 months ago
Generic Middleware Substrate Through Modelware
Abstract. Conventional middleware architectures suffer from insufficient module-level reusability and the ability to adapt in face of functionality evolution and diversification....
Charles Zhang, Dapeng Gao, Hans-Arno Jacobsen