94 search results - page 3 / 19 » Improving performance of high precision signal processing al... |
DATE
2003
IEEE
13 years 11 months ago
2003
IEEE
The design of clock distribution networks in synchronous digital systems presents enormous challenges. Controlling the clock signal delay in the presence of various noise sources,...
ICASSP
2011
IEEE
12 years 9 months ago
2011
IEEE
Common Spatial Pattern (CSP) is widely used in discriminating two classes of EEG in Brain Computer Interface applications. However, the performance of the CSP algorithm is affecte...
FPGA
2000
ACM
13 years 9 months ago
2000
ACM
The fastest known algorithms for factoring large numbers share a core sieving technique. The sieving cores find numbers that are completely factored over a prime base set raised t...
CC
2011
Springer
12 years 9 months ago
2011
Springer
For decades, the design and implementation of arrays in programming languages has reflected a natural tension between productivity and performance. Recently introduced HPCS langua...
ISCAS
2005
IEEE
13 years 11 months ago
2005
IEEE
: This paper presents a self-calibration method for designing high speed pipeline ADCs. Unlike all existing calibration algorithms, the proposed calibration does not insert any tes...