27 search results - page 1 / 6 » Improving the Efficiency of Power Simulators by Input Vector... |
DAC
1996
ACM
13 years 9 months ago
1996
ACM
Accurate power estimation is essential for low power digital CMOS circuit design. Power dissipation is input pattern dependent. To obtain an accurate power estimate, a large input...
DAC
1996
ACM
13 years 9 months ago
1996
ACM
- The problem of stochastic sequential machines (SSM) synthesis is addressed and its relationship with the constrained sequence generation problem which arises during power estimat...
MTV
2007
IEEE
13 years 11 months ago
2007
IEEE
Test vector ordering is recognized as a simple and non-intrusive approach to assist test power reduction. Simulation based test vector ordering approach to minimize circuit transit...
GLVLSI
2007
IEEE
13 years 6 months ago
2007
IEEE
We present a vector selection methodology for estimating the peak power dissipation in a CMOS logic circuit. The ultimate goal is to combine the speed of RT-level simulation with ...
ICCAD
1995
IEEE
13 years 8 months ago
1995
IEEE
: We present several techniques for accelerating dynamic vector compaction for combinational and sequential circuits. A key feature of all our techniques is that they significantly...