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» Increasing Register File Immunity to Transient Errors
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ISLPED
2006
ACM
100views Hardware» more  ISLPED 2006»
13 years 11 months ago
Selective writeback: exploiting transient values for energy-efficiency and performance
Today’s superscalar microprocessors use large, heavily-ported physical register files (RFs) to increase the instruction throughput. The high complexity and power dissipation of ...
Deniz Balkan, Joseph J. Sharkey, Dmitry Ponomarev,...
DSN
2005
IEEE
13 years 11 months ago
Engineering Over-Clocking: Reliability-Performance Trade-Offs for High-Performance Register Files
Register files are in the critical path of most high-performance processors and their latency is one of the most important factors that limit their size. Our goal is to develop er...
Gokhan Memik, Masud H. Chowdhury, Arindam Mallik, ...
DATE
2009
IEEE
101views Hardware» more  DATE 2009»
14 years 3 days ago
Static analysis to mitigate soft errors in register files
—With continuous technology scaling, soft errors are becoming an increasingly important design concern even for earth-bound applications. While compiler approaches have the poten...
Jongeun Lee, Aviral Shrivastava
LCTRTS
2009
Springer
14 years 3 days ago
A compiler optimization to reduce soft errors in register files
Register file (RF) is extremely vulnerable to soft errors, and traditional redundancy based schemes to protect the RF are prohibitive not only because RF is often in the timing c...
Jongeun Lee, Aviral Shrivastava
MICRO
2008
IEEE
208views Hardware» more  MICRO 2008»
13 years 11 months ago
Microarchitecture soft error vulnerability characterization and mitigation under 3D integration technology
— As semiconductor processing techniques continue to scale down, transient faults, also known as soft errors, are increasingly becoming a reliability threat to high-performance m...
Wangyuan Zhang, Tao Li