14 search results - page 1 / 3 » Increasing the effectiveness of directory caches by deactiva... |
ISCA
2011
IEEE
2011
IEEE
Increasing the effectiveness of directory caches by deactivating coherence for private memory blocks
12 years 8 months ago
To meet the demand for more powerful high-performance shared-memory servers, multiprocessor systems must incorporate efficient and scalable cache coherence protocols, such as thos...
ISLPED
2010
ACM
13 years 5 months ago
2010
ACM
On-chip coherence directories of today's multi-core systems are not energy efficient. Coherence directories dissipate a significant fraction of their power on unnecessary loo...
MICRO
2009
IEEE
13 years 11 months ago
2009
IEEE
A key challenge in architecting a CMP with many cores is maintaining cache coherence in an efficient manner. Directory-based protocols avoid the bandwidth overhead of snoop-based ...
ICPP
2007
IEEE
13 years 11 months ago
2007
IEEE
Ever-increasing memory footprint of applications and increasing mainstream popularity of shared memory parallel computing motivate us to explore memory compression potential in di...
DSN
2011
IEEE
12 years 4 months ago
2011
IEEE
—Aggressive technology scaling causes chip multiprocessors increasingly error-prone. Core-level faulttolerant approaches bind two cores to implement redundant execution and error...