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» Incremental formal design verification
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ISPD
1997
ACM
100views Hardware» more  ISPD 1997»
13 years 9 months ago
A pseudo-hierarchical methodology for high performance microprocessor design
- This paper reports on a highly effective methodology to construct complex high performance microprocessors. Critical aspects of the methodology include an integrated database for...
A. Bertolet, K. Carpenter, Keith M. Carrig, Albert...
BIRTHDAY
2010
Springer
13 years 5 months ago
Change Management for Heterogeneous Development Graphs
Abstract. The error-prone process of formal specification and verification of large systems requires an efficient, evolutionary formal development approach. Development graphs have...
Serge Autexier, Dieter Hutter, Till Mossakowski
ENTCS
2006
109views more  ENTCS 2006»
13 years 5 months ago
Incremental Verification for On-the-Fly Controller Synthesis
The CIRCA system automatically synthesizes hard real-time discrete event controllers from plant and environment descriptions. CIRCA's automatically-synthesized controllers pr...
David J. Musliner, Michael J. S. Pelican, Robert P...
DFT
2009
IEEE
189views VLSI» more  DFT 2009»
14 years 2 days ago
Analyzing Formal Verification and Testing Efforts of Different Fault Tolerance Mechanisms
Pre-fabrication design verification and post-fabrication chip testing are two important stages in the product realization process. These two stages consume a large part of resourc...
Meng Zhang, Anita Lungu, Daniel J. Sorin