44 search results - page 2 / 9 » Inductance Effects in RLC Trees |
TCAD
2002
13 years 4 months ago
2002
This paper introduces an accurate analysis of on-chip inductance effects for distributed interconnects that takes the effect of both the series resistance and the output parasitic ...
DAC
1998
ACM
14 years 5 months ago
1998
ACM
- A closed form solution for the output signal of a CMOS inverter driving an RLC transmission line is presented. This solution is based on the alpha power law for deep submicromete...
ISCAS
2005
IEEE
13 years 10 months ago
2005
IEEE
— Interconnect plays an increasingly important role in deep submicrometer VLSI technologies. Multiple design criteria are considered in interconnect design, such as delay, power,...
ISCAS
2005
IEEE
13 years 10 months ago
2005
IEEE
—In this work we propose a novel tree representation for RLC circuits. Genetic programming based on the tree representation is described and applied to passive filter synthesis p...
ISCAS
2005
IEEE
13 years 10 months ago
2005
IEEE
Inductance effects of on-chip interconnects have become more and more significant in today’s high-speed digital circuits, especially for global interconnects such as signal buse...