For a nanoCMOS of sub-65nm technology, where the gate oxide (SiO2) thickness is very low, the gate leakage is one of the major components of power dissipation. In this paper, we pr...
- One of the critical issues in MTCMOS design is how to estimate a circuit delay quickly. In this paper, we propose a delay modeling and static timing analysis (STA) methodology ta...
Leakage power has become one of the most critical design concerns for the system-level chip designer. Multi-threshold techniques have been used to reduce runtime leakage power wit...
—Power consumption has emerged as the premier and most constraining aspect in modern microprocessor and application-specific designs. Gate sizing has been shown to be one of the...
Foad Dabiri, Ani Nahapetian, Miodrag Potkonjak, Ma...
Power consumption has emerged as the premier and most constraining aspect in modern microprocessor and application-specific designs. Gate sizing has been shown to be one of the mos...
Foad Dabiri, Ani Nahapetian, Tammara Massey, Miodr...