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DATE
2008
IEEE
62views Hardware» more  DATE 2008»
13 years 11 months ago
Instruction Cache Energy Saving Through Compiler Way-Placement
Fetching instructions from a set-associative cache in an embedded processor can consume a large amount of energy due to the tag checks performed. Recent proposals to address this ...
Timothy M. Jones, Sandro Bartolini, Bruno De Bus, ...
MICRO
2002
IEEE
117views Hardware» more  MICRO 2002»
13 years 4 months ago
Generating physical addresses directly for saving instruction TLB energy
Power consumption and power density for the Translation Lookaside Buffer (TLB) are important considerations not only in its design, but can have a consequence on cache design as w...
Ismail Kadayif, Anand Sivasubramaniam, Mahmut T. K...
DAC
2009
ACM
14 years 5 months ago
A DVS-based pipelined reconfigurable instruction memory
Energy consumption is of significant concern in battery operated embedded systems. In the processors of such systems, the instruction cache consumes a significant fraction of the ...
Zhiguo Ge, Tulika Mitra, Weng-Fai Wong
CODES
2005
IEEE
13 years 6 months ago
An efficient direct mapped instruction cache for application-specific embedded systems
Caches may consume half of a microprocessor’s total power and cache misses incur accessing off-chip memory, which is both time consuming and energy costly. Therefore, minimizing...
Chuanjun Zhang
CASES
2008
ACM
13 years 6 months ago
Efficient code caching to improve performance and energy consumption for java applications
Java applications rely on Just-In-Time (JIT) compilers or adaptive compilers to generate and optimize binary code at runtime to boost performance. In conventional Java Virtual Mac...
Yu Sun, Wei Zhang