138 search results - page 26 / 28 » Instruction Scheduling and Executable Editing |
ICLP
2005
Springer
13 years 10 months ago
2005
Springer
We present a methodology for the modeling of complex program behavior in CLP. In the first part we present an informal description about how to represent a system in CLP. At its ...
ISCA
2000
IEEE
13 years 9 months ago
2000
IEEE
Smaller feature sizes, reduced voltage levels, higher transistor counts, and reduced noise margins make future generations of microprocessors increasingly prone to transient hardw...
MICRO
1997
IEEE
13 years 9 months ago
1997
IEEE
Compiler optimizations are often driven by specific assumptions about the underlying architecture and implementation of the target machine. For example, when targeting shared-mem...
HPCA
2009
IEEE
14 years 5 months ago
2009
IEEE
Heterogeneous multicores, such as Cell BE processors and GPGPUs, typically do not have caches for their accelerator cores because coherence traffic, cache misses, and latencies fr...
PLDI
2003
ACM
13 years 10 months ago
2003
ACM
Speculative execution, such as control speculation and data speculation, is an effective way to improve program performance. Using edge/path profile information or simple heuristi...