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ISCAPDCS
2001
13 years 7 months ago
Performance Evaluation of a Non-Blocking Multithreaded Architecture for Embedded, Real-Time and DSP Applications
This paper presents the evaluation of a non-blocking, decoupled memory/execution, multithreaded architecture known as the Scheduled Dataflow (SDF). The major recent trend in digit...
Krishna M. Kavi, Joseph Arul, Roberto Giorgi
ASPLOS
1992
ACM
13 years 9 months ago
Efficient Superscalar Performance Through Boosting
The foremost goal of superscalar processor design is to increase performance through the exploitation of instruction-level parallelism (ILP). Previous studies have shown that spec...
Michael D. Smith, Mark Horowitz, Monica S. Lam
ADAEUROPE
2010
Springer
13 years 10 months ago
What to Make of Multicore Processors for Reliable Real-Time Systems?
Now that multicore microprocessors have become a commodity, it is natural to think about employing them in all kinds of computing, including high-reliability embedded real-time sy...
Theodore P. Baker
FSEN
2009
Springer
14 years 3 days ago
Modular Schedulability Analysis of Concurrent Objects in Creol
We present an automata theoretic framework for modular schedulability analysis of real time asynchronous objects modeled in the language Creol. In previous work we analyzed the sch...
Frank S. de Boer, Tom Chothia, Mohammad Mahdi Jagh...
RTS
2006
129views more  RTS 2006»
13 years 5 months ago
Modeling out-of-order processors for WCET analysis
Estimating the Worst Case Execution Time (WCET) of a program on a given processor is important for the schedulability analysis of real-time systems. WCET analysis techniques typic...
Xianfeng Li, Abhik Roychoudhury, Tulika Mitra