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MICRO
2007
IEEE
168views Hardware» more  MICRO 2007»
13 years 11 months ago
Global Multi-Threaded Instruction Scheduling
Recently, the microprocessor industry has moved toward chip multiprocessor (CMP) designs as a means of utilizing the increasing transistor counts in the face of physical and micro...
Guilherme Ottoni, David I. August
WSC
2007
13 years 7 months ago
What I wish they would have taught me (or that I would have better remembered!) in school
This panel reflects upon their experiences as simulation professionals and shares their thoughts regarding elements of their simulation education that they have found most helpful...
Charles R. Standridge, Daniel A. Finke, Carley Jur...
DATE
2009
IEEE
189views Hardware» more  DATE 2009»
13 years 11 months ago
CUFFS: An instruction count based architectural framework for security of MPSoCs
—Multiprocessor System on Chip (MPSoC) architecture is rapidly gaining momentum for modern embedded devices. The vulnerabilities in software on MPSoCs are often exploited to caus...
Krutartha Patel, Sri Parameswaran, Roshan G. Ragel
HICSS
2000
IEEE
125views Biometrics» more  HICSS 2000»
13 years 9 months ago
Beyond Bounded Activity Systems: Heterogeneous Cultures in Instructional Uses of Persistent Conversation
This paper proposes a two-level theoretical framework for the study of CMC illustrating the principles of mediation and contextual analysis. Based on log files and interviews from...
Steven L. Thorne
CSB
2005
IEEE
130views Bioinformatics» more  CSB 2005»
13 years 10 months ago
iSimBioSys: An "In Silico" Discrete Event Simulation Framework for Modeling Biological Systems
The genome projects have provided comprehensive information about the basic building blocks of life. The next challenge is to understand how biological functions emerge from compl...
Samik Ghosh, Preetam Ghosh, Kalyan Basu, Sajal K. ...