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» Integrated Design Environment for Reconfigurable HPC
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DATE
2004
IEEE
168views Hardware» more  DATE 2004»
13 years 9 months ago
Architectures and Design Techniques for Energy Efficient Embedded DSP and Multimedia Processing
Energy efficient embedded systems consist of a heterogeneous collection of very specific building blocks, connected together by a complex network of many dedicated busses and inte...
Ingrid Verbauwhede, Patrick Schaumont, Christian P...
CODES
2002
IEEE
13 years 10 months ago
Dynamic run-time HW/SW scheduling techniques for reconfigurable architectures
Dynamic run-time scheduling in System-on-Chip platforms has become recently an active area of research because of the performance and power requirements of new applications. Moreo...
Juanjo Noguera, Rosa M. Badia
DSN
2003
IEEE
13 years 11 months ago
Integrating Recovery Strategies into a Primary Substation Automation System
The DepAuDE architecture provides middleware to integrate fault tolerance support into distributed embedded automation applications. It allows error recovery to be expressed in te...
Geert Deconinck, Vincenzo De Florio, Ronnie Belman...
DATE
2008
IEEE
199views Hardware» more  DATE 2008»
14 years 7 days ago
Safe Automatic Flight Back and Landing of Aircraft Flight Reconfiguration Function (FRF)
SOFIA (Safe Automatic Flight Back and Landing of Aircraft) project is a response to the challenge of developing concepts and techniques enabling the safe and automatic return to g...
Juan Alberto Herreria Garcia
JNSM
2010
166views more  JNSM 2010»
13 years 17 days ago
High-Level Design Approach for the Specification of Cognitive Radio Equipments Management APIs
Cognitive Radio (CR) equipments are radio devices that support the smart facilities offered by future cognitive networks. Even if several categories of equipments exist (terminal,...
Christophe Moy