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» Integrated circuit implementation of a cortical neuron
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ICONIP
2007
13 years 6 months ago
Analog CMOS Circuits Implementing Neural Segmentation Model Based on Symmetric STDP Learning
We proposed a neural segmentation model that is suitable for implementation in analog VLSIs using conventional CMOS technology. The model consists of neural oscillators mutually co...
Gessyca Maria Tovar, Eric Shun Fukuda, Tetsuya Asa...
BIOSYSTEMS
2008
107views more  BIOSYSTEMS 2008»
13 years 5 months ago
The linearity of emergent spectro-temporal receptive fields in a model of auditory cortex
The responses of cortical neurons are often characterized by measuring their spectro-temporal receptive fields (strfs). The strf of a cell can be thought of as a representation of...
Martin Coath, Emili Balaguer-Ballester, Sue L. Den...
ICCAD
2003
IEEE
198views Hardware» more  ICCAD 2003»
14 years 2 months ago
A CAD Framework for Co-Design and Analysis of CMOS-SET Hybrid Integrated Circuits
This paper introduces a CAD framework for co-simulation of hybrid circuits containing CMOS and SET (Single Electron Transistor) devices. An improved analytical model for SET is al...
Santanu Mahapatra, Kaustav Banerjee, Florent Pegeo...
NIPS
2004
13 years 6 months ago
Bayesian inference in spiking neurons
We propose a new interpretation of spiking neurons as Bayesian integrators accumulating evidence over time about events in the external world or the body, and communicating to oth...
Sophie Deneve
CICC
2011
106views more  CICC 2011»
12 years 5 months ago
A 45nm CMOS neuromorphic chip with a scalable architecture for learning in networks of spiking neurons
Efforts to achieve the long-standing dream of realizing scalable learning algorithms for networks of spiking neurons in silicon have been hampered by (a) the limited scalability of...
Jae-sun Seo, Bernard Brezzo, Yong Liu, Benjamin D....