12 search results - page 2 / 3 » Integrating Communication Protocol Selection with Partitioni... |
CODES
1999
IEEE
13 years 9 months ago
1999
IEEE
o much higher levels of abstraction than today's design practices, which are usually at the level of synthesizable RTL for custom hardware or Instruction Set Simulator (ISS) f...
ARC
2010
Springer
13 years 5 months ago
2010
Springer
Using FPGAs to accelerate High Performance Computing (HPC) applications is attractive, but has a huge associated cost: the time spent, not for developing efficient FPGA code but fo...
ICCAD
1998
IEEE
13 years 9 months ago
1998
IEEE
Designers of distributed embedded systems face many challenges in determining the appropriate tradeoffs to make when defining a system architecture or retargeting an existing desi...
CODES
2003
IEEE
13 years 10 months ago
2003
IEEE
Distributed embedded systems implemented with mixed, eventtriggered and time-triggered task sets, which communicate over bus protocols consisting of both static and dynamic phases...
FPL
2005
Springer
13 years 11 months ago
2005
Springer
— During codesign of a system, one still runs into the impedance mismatch between the software and hardware worlds. er identifies the different levels of abstraction of hardware...