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» Integrating Organizational Memory and Performance Support
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MICRO
2005
IEEE
130views Hardware» more  MICRO 2005»
13 years 11 months ago
Exploiting Vector Parallelism in Software Pipelined Loops
An emerging trend in processor design is the addition of short vector instructions to general-purpose and embedded ISAs. Frequently, these extensions are employed using traditiona...
Samuel Larsen, Rodric M. Rabbah, Saman P. Amarasin...
RTAS
1997
IEEE
13 years 9 months ago
Scalable Hardware Priority Queue Architectures for High-Speed Packet Switches
ÐWith effective packet-scheduling mechanisms, modern integrated networks can support the diverse quality-of-service requirements of emerging applications. However, arbitrating bet...
Sung-Whan Moon, Kang G. Shin, Jennifer Rexford
IJHPCA
2011
201views more  IJHPCA 2011»
13 years 8 days ago
The International Exascale Software Project roadmap
  Over the last twenty years, the open source community has provided more and more software on which the world’s High Performance Computing (HPC) systems depend for performance ...
Jack Dongarra, Peter H. Beckman, Terry Moore, Patr...