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ICS
2001
Tsinghua U.
13 years 9 months ago
Integrating superscalar processor components to implement register caching
A large logical register file is important to allow effective compiler transformations or to provide a windowed space of registers to allow fast function calls. Unfortunately, a l...
Matt Postiff, David Greene, Steven E. Raasch, Trev...
HPCA
2006
IEEE
14 years 5 months ago
An approach for implementing efficient superscalar CISC processors
An integrated, hardware / software co-designed CISC processor is proposed and analyzed. The objectives are high performance and reduced complexity. Although the x86 ISA is targete...
Shiliang Hu, Ilhyun Kim, Mikko H. Lipasti, James E...
MST
2002
107views more  MST 2002»
13 years 4 months ago
A Comparison of Asymptotically Scalable Superscalar Processors
The poor scalability of existing superscalar processors has been of great concern to the computer engineering community. In particular, the critical-path lengths of many components...
Bradley C. Kuszmaul, Dana S. Henry, Gabriel H. Loh
ICCD
2004
IEEE
104views Hardware» more  ICCD 2004»
14 years 1 months ago
Exploiting Quiescent States in Register Lifetime
Large register file with multiple ports, but with a minimal access time, is a critical component in a superscalar processor. Analysis of the lifetime of a logical to physical reg...
Rama Sangireddy, Arun K. Somani
ISLPED
2003
ACM
95views Hardware» more  ISLPED 2003»
13 years 10 months ago
Power efficient comparators for long arguments in superscalar processors
Traditional pulldown comparators that are used to implement associativeaddressing logic in superscalar microprocessors dissipate energy on a mismatch in any bit position in the co...
Dmitry Ponomarev, Gurhan Kucuk, Oguz Ergin, Kanad ...