Sciweavers

24 search results - page 5 / 5
» Integrating superscalar processor components to implement re...
Sort
View
CASES
2006
ACM
13 years 11 months ago
Integrated scratchpad memory optimization and task scheduling for MPSoC architectures
Multiprocessor system-on-chip (MPSoC) is an integrated circuit containing multiple instruction-set processors on a single chip that implements most of the functionality of a compl...
Vivy Suhendra, Chandrashekar Raghavan, Tulika Mitr...
JSA
2000
116views more  JSA 2000»
13 years 5 months ago
Distributed vector architectures
Integrating processors and main memory is a promising approach to increase system performance. Such integration provides very high memory bandwidth that can be exploited efficientl...
Stefanos Kaxiras
ISCA
2008
IEEE
113views Hardware» more  ISCA 2008»
14 years 4 days ago
A Two-Level Load/Store Queue Based on Execution Locality
Multicore processors have emerged as a powerful platform on which to efficiently exploit thread-level parallelism (TLP). However, due to Amdahl’s Law, such designs will be incr...
Miquel Pericàs, Adrián Cristal, Fran...
HPCA
2001
IEEE
14 years 6 months ago
Speculative Data-Driven Multithreading
Mispredicted branches and loads that miss in the cache cause the majority of retirement stalls experienced by sequential processors; we call these critical instructions. Despite t...
Amir Roth, Gurindar S. Sohi