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» Interconnect Analysis: From 3-D Structures to Circuit Models
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DAC
1999
ACM
13 years 9 months ago
Interconnect Analysis: From 3-D Structures to Circuit Models
In this survey paper we describethe combination of: discretized integral formulations, sparsication techniques, and krylov-subspace based model-order reduction that has led to rob...
Mattan Kamon, Nuno Alexandre Marques, Yehia Massou...
DAC
1998
ACM
14 years 5 months ago
A Mixed Nodal-Mesh Formulation for Efficient Extraction and Passive Reduced-Order Modeling of 3D Interconnects
As VLSI circuit speeds have increased, reliable chip and system design can no longer be performed without accurate threedimensional interconnect models. In this paper, we describe...
Nuno Alexandre Marques, Mattan Kamon, Jacob White,...
ICCAD
2006
IEEE
137views Hardware» more  ICCAD 2006»
14 years 1 months ago
Yield prediction for 3D capacitive interconnections
Capacitive interconnections are very promising structures for high-speed and low-power signaling in 3D packages. Since the performance of AC links, in terms of Band-Width and Bit-...
Alberto Fazzi, L. Magagni, Mario de Dominicis, Pao...
SLIP
2009
ACM
13 years 11 months ago
From 3D circuit technologies and data structures to interconnect prediction
New technologies such as 3D integration are becoming a new force that is keeping Moore’s law in effect in today’s nano era. By adding a third dimension in current 2D circuits...
Robert Fischbach, Jens Lienig, Tilo Meister
3DIC
2009
IEEE
279views Hardware» more  3DIC 2009»
13 years 11 months ago
Compact modelling of Through-Silicon Vias (TSVs) in three-dimensional (3-D) integrated circuits
Abstract—Modeling parasitic parameters of Through-SiliconVia (TSV) structures is essential in exploring electrical characteristics such as delay and signal integrity (SI) of circ...
Roshan Weerasekera, Matt Grange, Dinesh Pamunuwa, ...