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IWANN
2007
Springer
13 years 11 months ago
Interconnecting VLSI Spiking Neural Networks Using Isochronous Connections
This paper presents a network architecture to interconnect mixed-signal VLSI1 integrate-and-fire neural networks in a way that the timing of the neural network data is preserved. ...
Stefan Philipp, Andreas Grübl, Karlheinz Meie...
NIPS
2007
13 years 6 months ago
Contraction Properties of VLSI Cooperative Competitive Neural Networks of Spiking Neurons
A non–linear dynamic system is called contracting if initial conditions are forgotten exponentially fast, so that all trajectories converge to a single trajectory. We use contra...
Emre Neftci, Elisabetta Chicca, Giacomo Indiveri, ...
ISCAS
2011
IEEE
278views Hardware» more  ISCAS 2011»
12 years 8 months ago
A programmable axonal propagation delay circuit for time-delay spiking neural networks
— we present an implementation of a programmable axonal propagation delay circuit which uses one first-order logdomain low-pass filter. Delays may be programmed in the 550ms rang...
Runchun Wang, Craig T. Jin, Alistair McEwan, Andr&...
FCCM
2009
IEEE
147views VLSI» more  FCCM 2009»
13 years 8 months ago
FPGA Accelerated Simulation of Biologically Plausible Spiking Neural Networks
Artificial neural networks are a key tool for researchers attempting to understand and replicate the behaviour and intelligence found in biological neural networks. Software simul...
David Thomas, Wayne Luk
FCCM
2000
IEEE
103views VLSI» more  FCCM 2000»
13 years 9 months ago
A Networked FPGA-Based Hardware Implementation of a Neural Network Application
This paper describes a networked FPGA-based implementation of the FAST (Flexible Adaptable-Size Topology) architecture, a Arti cial Neural Network (ANN) that dynamically adapts it...
Héctor Fabio Restrepo, Ralph Hoffmann, Andr...