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» JHDL - An HDL for Reconfigurable Systems
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FCCM
1998
IEEE
148views VLSI» more  FCCM 1998»
13 years 9 months ago
JHDL - An HDL for Reconfigurable Systems
JHDL is a design tool for reconfigurable systems that allows designers to express circuit organizations that dynamically change over time in a natural way, using only standard pro...
Peter Bellows, Brad L. Hutchings
FDL
2004
IEEE
13 years 8 months ago
Designing for dynamic partially reconfigurable FPGAs with SystemC and OSSS
This paper presents a new approach to design embedded systems based on dynamic partial reconfigurable FPGAs. The approach is intended to allow designing of systems with runtime re...
Andreas Schallenberg, Frank Oppenheimer, Wolfgang ...
ICCD
2001
IEEE
112views Hardware» more  ICCD 2001»
14 years 2 months ago
Run-Time Execution of Reconfigurable Hardware in a Java Environment
We present tools that support the runtime execution of applications that mix software running on networks of workstations and reconfigurable hardware. We use JHDL to describe the ...
Laurie A. Smith King, Heather Quinn, Miriam Leeser...
DATE
2004
IEEE
120views Hardware» more  DATE 2004»
13 years 9 months ago
Evaluation of SystemC Modelling of Reconfigurable Embedded Systems
This paper evaluates the use of pin and cycle accurate SystemC models for embedded system design exploration and early software development. The target system is MicroBlaze Vanill...
Tero Rissa, Adam Donlin, Wayne Luk
IEEECIT
2010
IEEE
13 years 3 months ago
SAT: A Stream Architecture Template for Embedded Applications
- The increase of embedded applications complexity has demanded hardware more flexible while providing higher performance. Reconfigurable architectures and stream processing have b...
Qianming Yang, Nan Wu, Mei Wen, Yi He, Huayou Su, ...