7 search results - page 1 / 2 » KL-Cuts: A new approach for logic synthesis targeting multip... |
DATE
2010
IEEE
13 years 10 months ago
2010
IEEE
— This paper introduces the concept of kl-feasible cuts, by controlling both the number k of inputs and the number l of outputs in a circuit cut. To provide scalability, the conc...
GLVLSI
2007
IEEE
13 years 12 months ago
2007
IEEE
A PAL-based logic block is the core of great majority of contemporary CPLD devices. The purpose of the paper is to present a new approach to multi-level synthesis for PAL-based CP...
DATE
2000
IEEE
13 years 10 months ago
2000
IEEE
Traditional FPGA design flows have treated logic synthesis and physical design as separate steps. With the recent advances in technology, the lack of information on the physical ...
DATE
2010
IEEE
13 years 9 months ago
2010
IEEE
─ Error tolerance formally captures the notion that – for a wide variety of applications including audio, video, graphics, and wireless communications – a defective chip that...
CIIA
2009
13 years 6 months ago
2009
In this paper, we present a new synthesis feature namely, "Xor matching", and the foldback product term synthesis for Complex Programmable Logic Devices (CPLD) architectu...