19 search results - page 1 / 4 » Latency and bandwidth efficient communication through system... |
DAC
2008
ACM
14 years 5 months ago
2008
ACM
We present a cross-layer customization methodology for latency and bandwidth efficient inter-core communication in embedded multiprocessors. The methodology integrates compiler, o...
DSD
2006
IEEE
13 years 8 months ago
2006
IEEE
Title of thesis: Energy-Efficient Cache Coherence for Embedded Multi-Processor Systems through Application-Driven Snoop Filtering Alokika Dash, Master of Science, 2006 Thesis dire...
DSD
2007
IEEE
13 years 11 months ago
2007
IEEE
Abstract. In an embedded multiprocessor system the minimum throughput and maximum latency of real-time applications are usually derived given the worst-case execution time of the s...
FPL
2006
Springer
13 years 8 months ago
2006
Springer
With current FPGAs, designers can now instantiate several embedded processors, memory units, and a wide variety of IP blocks to build a single-chip, high-performance multiprocesso...
ASAP
2000
IEEE
13 years 9 months ago
2000
IEEE
This paper explores the problem of efficiently ordering interprocessor communication operations in statically-scheduled multiprocessors for iterative dataflow graphs. In most digi...