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ISLPED
2007
ACM
169views Hardware» more  ISLPED 2007»
13 years 6 months ago
Throughput of multi-core processors under thermal constraints
We analyze the effect of thermal constraints on the performance and power of multi-core processors. We propose system-level power and thermal models, and derive expressions for (a...
Ravishankar Rao, Sarma B. K. Vrudhula, Chaitali Ch...
RTSS
2006
IEEE
13 years 11 months ago
Delay Analysis in Temperature-Constrained Hard Real-Time Systems with General Task Arrivals
In this paper, we study temperature-constrained hard realtime systems, where real-time guarantees must be met without exceeding safe temperature levels within the processor. Dynam...
Shengquan Wang, Riccardo Bettati
IEICET
2006
79views more  IEICET 2006»
13 years 5 months ago
System LSI: Challenges and Opportunities
End of CMOS scaling has been discussed in many places since the late 90's. Even if the end of CMOS scaling is irrelevant, it is for sure that we are facing a turning point in...
Tadahiro Kuroda
VLSID
2010
IEEE
190views VLSI» more  VLSID 2010»
13 years 3 months ago
Rethinking Threshold Voltage Assignment in 3D Multicore Designs
Due to the inherent nature of heat flow in 3D integrated circuits, stacked dies exhibit a wide range of thermal characteristics. The strong dependence of leakage with temperature...
Koushik Chakraborty, Sanghamitra Roy
CODES
2006
IEEE
13 years 11 months ago
Floorplan driven leakage power aware IP-based SoC design space exploration
Multi-million gate System-on-Chip (SoC) designs increasingly rely on Intellectual Property (IP) blocks. However, due to technology scaling the leakage power consumption of the IP ...
Aseem Gupta, Nikil D. Dutt, Fadi J. Kurdahi, Kamal...