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ISPD
1999
ACM
89views Hardware» more  ISPD 1999»
13 years 9 months ago
VIA design rule consideration in multi-layer maze routing algorithms
—Maze routing algorithms are widely used for finding an optimal path in detailed routing for very large scale integration, printed circuit board and multichip modules In this pap...
Jason Cong, Jie Fang, Kei-Yong Khoo
ISCAS
2005
IEEE
122views Hardware» more  ISCAS 2005»
13 years 11 months ago
A mixed analog-digital hybrid for speech enhancement purposes
Abstract— This paper presents and evaluates a hybrid implementation of a low complexity algorithm for speech enhancement, the Adaptive Gain Equalizer (AGE). The AGE is a subband ...
Benny Sallberg, Mattias Dahl, Henrik Akesson, Ingv...
ASPDAC
1998
ACM
91views Hardware» more  ASPDAC 1998»
13 years 9 months ago
Curvilinear Detailed Routing Algorithm and Its Extension to Wire-Spreading and Wire-Fattening
— This article describes an algorithm for curvilinear detailed routing. We significantly improved the average time performance of Gao’s algorithm by resolving its bottleneck r...
Toshiyuki Hama, Hiroaki Etoh
DAC
1998
ACM
14 years 6 months ago
Performance Driven Multi-Layer General Area Routing for PCB/MCM Designs
In this paper we present a new global router appropriate for Multichip Module MCM and dense Printed Circuit Board PCB design, which utilizes a hybrid of the classical rip-up and r...
Jason Cong, Patrick H. Madden