19 search results - page 1 / 4 » Library-less synthesis for static CMOS combinational logic c... |
ICCAD
1997
IEEE
13 years 9 months ago
1997
IEEE
Traditional synthesis techniques optimize CMOS circuits in two phases i) logic minimization and ii) library mapping phase. Typically, the structures and the sizes of the gates in ...
ICCAD
1999
IEEE
13 years 9 months ago
1999
IEEE
In this paper, we present a new approach to the problem of inverter elimination in domino logic synthesis. A small piece of static CMOS logic is introduced to the circuit to avoid...
VLSID
2002
IEEE
14 years 5 months ago
2002
IEEE
This paper presents a novel approach for the synthesis of dynamic CMOS circuits using Domino and Nora styles. As these logic styles can implement only non-inverting logic, convent...
ARVLSI
2001
IEEE
13 years 8 months ago
2001
IEEE
Output Prediction Logic (OPL) is a technique that can be applied to conventional CMOS logic families to obtain considerable speedups. When applied to static CMOS, OPL retains the ...
DAC
2003
ACM
14 years 5 months ago
2003
ACM
A digital combinational logic circuit is reversible if it maps each input pattern to a unique output pattern. Such circuits are of interest in quantum computing, optical computing...