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VLSID
2004
IEEE
112views VLSI» more  VLSID 2004»
14 years 5 months ago
Profiling Driven Computation Reuse: An Embedded Software Synthesis Technique for Energy and Performance Optimization
It has been observed that even highly optimized software programs perform "redundant" computations during their execution, due to the nature (statistics) of the values a...
Weidong Wang, Anand Raghunathan, Niraj K. Jha
DAC
2004
ACM
13 years 10 months ago
Fast and accurate parasitic capacitance models for layout-aware
Considering layout effects early in the analog design process is becoming increasingly important. We propose techniques for estimating parasitic capacitances based on look-up tabl...
Anuradha Agarwal, Hemanth Sampath, Veena Yelamanch...
ICCAD
2003
IEEE
129views Hardware» more  ICCAD 2003»
14 years 1 months ago
ILP Models for the Synthesis of Asynchronous Control Circuits
A new technique for the logic synthesis of asynchronous circuits is presented. It is based on the structural theory of Petri nets and integer linear programming. The technique is ...
Josep Carmona, Jordi Cortadella
ISLPED
2003
ACM
96views Hardware» more  ISLPED 2003»
13 years 10 months ago
Effective graph theoretic techniques for the generalized low power binding problem
This paper proposes two very fast graph theoretic heuristics for the low power binding problem given fixed number of resources and multiple architectures for the resources. First...
Azadeh Davoodi, Ankur Srivastava
CORR
2010
Springer
153views Education» more  CORR 2010»
13 years 4 months ago
The Automatic Synthesis of Linear Ranking Functions: The Complete Unabridged Version
The classical technique for proving termination of a generic sequential computer program involves the synthesis of a ranking function for each loop of the program. Linear ranking ...
Roberto Bagnara, Fred Mesnard, Andrea Pescetti, En...