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» Localized microarchitecture-level voltage management
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ICPP
2008
IEEE
13 years 11 months ago
Optimizing Issue Queue Reliability to Soft Errors on Simultaneous Multithreaded Architectures
The issue queue (IQ) is a key microarchitecture structure for exploiting instruction-level and thread-level parallelism in dynamically scheduled simultaneous multithreaded (SMT) p...
Xin Fu, Wangyuan Zhang, Tao Li, José A. B. ...
CODES
2001
IEEE
13 years 8 months ago
Hybrid global/local search strategies for dynamic voltage scaling in embedded multiprocessors
In this paper, we explore a hybrid global/local search optimization framework for dynamic voltage scaling in embedded multiprocessor systems. The problem is to find, for a multipr...
Neal K. Bambha, Shuvra S. Bhattacharyya, Jürg...
ICCAD
2009
IEEE
171views Hardware» more  ICCAD 2009»
13 years 2 months ago
A hybrid local-global approach for multi-core thermal management
Multi-core processors have become an integral part of mainstream high performance computer systems. In parallel, exponentially increasing power density and packaging costs have ne...
Ramkumar Jayaseelan, Tulika Mitra
CODES
2006
IEEE
13 years 10 months ago
Hardware based frequency/voltage control of voltage frequency island systems
The ability to do fine grain power management via local voltage selection has shown much promise via the use of Voltage/ Frequency Islands (VFIs). VFI-based designs combine the a...
Puru Choudhary, Diana Marculescu
DATE
2007
IEEE
105views Hardware» more  DATE 2007»
13 years 11 months ago
Understanding voltage variations in chip multiprocessors using a distributed power-delivery network
— Recent efforts to address microprocessor power dissipation through aggressive supply voltage scaling and power management require that designers be increasingly cognizant of po...
Meeta Sharma Gupta, Jarod L. Oatley, Russ Joseph, ...