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» Logic Synthesis for Asynchronous Circuits Based on Petri Net...
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ACSD
2004
IEEE
113views Hardware» more  ACSD 2004»
13 years 8 months ago
Logic Synthesis for Asynchronous Circuits Based on Petri Net Unfoldings and Incremental SAT
The behaviour of asynchronous circuits is often described by Signal Transition Graphs (STGs), which are Petri nets whose transitions are interpreted as rising and falling edges of...
Victor Khomenko, Maciej Koutny, Alexandre Yakovlev
AC
2003
Springer
13 years 10 months ago
Synthesis of Asynchronous Hardware from Petri Nets
Abstract. As semiconductor technology strides towards billions of transistors on a single die, problems concerned with deep sub-micron process features and design productivity call...
Josep Carmona, Jordi Cortadella, Victor Khomenko, ...
ACSD
2003
IEEE
105views Hardware» more  ACSD 2003»
13 years 8 months ago
Detecting State Coding Conflicts in STG Unfoldings Using SAT
Abstract. The behaviour of asynchronous circuits is often described by Signal Transition Graphs (STGs), which are Petri nets whose transitions are interpreted as rising and falling...
Victor Khomenko, Maciej Koutny, Alexandre Yakovlev
ICCAD
2003
IEEE
129views Hardware» more  ICCAD 2003»
14 years 1 months ago
ILP Models for the Synthesis of Asynchronous Control Circuits
A new technique for the logic synthesis of asynchronous circuits is presented. It is based on the structural theory of Petri nets and integer linear programming. The technique is ...
Josep Carmona, Jordi Cortadella
DAC
2006
ACM
14 years 5 months ago
State encoding of large asynchronous controllers
A novel method to solve the state encoding problem in Signal Transition Graphs is presented. It is based on the structural theory of Petri nets and can be applied to large specifi...
Josep Carmona, Jordi Cortadella