14 search results - page 2 / 3 » Logic and Layout Aware Voltage Island Generation for Low Pow... |
CODES
2006
IEEE
13 years 11 months ago
2006
IEEE
Design of System-on-Chip (SoC) with regular mesh based Network-on-Chip (NoC) consists of mapping processing cores to routers, and routing of the traffic traces on the topology suc...
TVLSI
2002
13 years 4 months ago
2002
Simultaneous switching noise (SSN) has become an important issue in the design of the internal on-chip power distribution networks in current very large scale integration/ultra lar...
ICPPW
2007
IEEE
13 years 11 months ago
2007
IEEE
We study the role of task-level scheduling in power management on multicore multiple voltage embedded systems. Multicore on-achip, in particular DSP systems, can greatly improve p...
HPCA
2011
IEEE
12 years 9 months ago
2011
IEEE
Extreme technology integration in the sub-micron regime comes with a rapid rise in heat dissipation and power density for modern processors. Dynamic voltage scaling is a widely us...
DAC
2007
ACM
14 years 6 months ago
2007
ACM
This paper presents a variation resilient circuit design technique for maintaining parametric yield of design under inherent variation in process parameters. We propose to utilize...