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IEEEPACT
2009
IEEE
13 years 3 months ago
Adaptive Locks: Combining Transactions and Locks for Efficient Concurrency
Transactional memory is being advanced as an alternative to traditional lock-based synchronization for concurrent programming. Transactional memory simplifies the programming mode...
Takayuki Usui, Reimer Behrends, Jacob Evans, Yanni...
CORR
2011
Springer
179views Education» more  CORR 2011»
13 years 9 days ago
An overview of Ciao and its design philosophy
We provide an overall description of the Ciao multiparadigm programming system emphasizing some of the novel aspects and motivations behind its design and implementation. An impor...
Manuel V. Hermenegildo, Francisco Bueno, Manuel Ca...
CORR
2010
Springer
127views Education» more  CORR 2010»
13 years 8 days ago
Complexity of Data Dependence problems for Program Schemas with Concurrency
am analysis and has been widely studied. In this paper we consider this problem at the abstraction level of program schemas in which computations occur in the Herbrand domain of te...
Sebastian Danicic, Robert M. Hierons, Michael R. L...
ISCA
2011
IEEE
386views Hardware» more  ISCA 2011»
12 years 9 months ago
Architecting on-chip interconnects for stacked 3D STT-RAM caches in CMPs
Emerging memory technologies such as STT-RAM, PCRAM, and resistive RAM are being explored as potential replacements to existing on-chip caches or main memories for future multi-co...
Asit K. Mishra, Xiangyu Dong, Guangyu Sun, Yuan Xi...
FPGA
2006
ACM
224views FPGA» more  FPGA 2006»
13 years 9 months ago
Flexible implementation of genetic algorithms on FPGAs
In this paper, we propose a technique to flexibly implement genetic algorithms for various problems on FPGAs. For the purpose, we propose a basic architecture for GA which consist...
Tatsuhiro Tachibana, Yoshihiro Murata, Naoki Shiba...