35 search results - page 4 / 7 » Loop Scheduling and Partitions for Hiding Memory Latencies |
ICPP
1998
IEEE
13 years 10 months ago
1998
IEEE
Exploiting locality at run-time is a complementary approach to a compiler approach for those applications with dynamic memory access patterns. This paper proposes a memory-layout ...
ISCA
2010
IEEE
13 years 11 months ago
2010
IEEE
SIMD organizations amortize the area and power of fetch, decode, and issue logic across multiple processing units in order to maximize throughput for a given area and power budget...
ICS
2007
Tsinghua U.
14 years 9 days ago
2007
Tsinghua U.
Overlapping communication with computation is an important optimization on current cluster architectures; its importance is likely to increase as the doubling of processing power ...
MICRO
2002
IEEE
13 years 11 months ago
2002
IEEE
Clustering is a common technique to overcome the wire delay problem incurred by the evolution of technology. Fully-distributed architectures, where the register file, the functio...
DAC
2000
ACM
14 years 7 months ago
2000
ACM
Memory delays represent a major bottleneck in embedded systems performance. Newer memory modules exhibiting efficient access modes (e.g., page-, burst-mode) partly alleviate this ...