155 search results - page 2 / 31 » Low Power Techniques for Digital GaAs VLSI |
ISLPED
1998
ACM
13 years 9 months ago
1998
ACM
ISLPED
1997
ACM
13 years 9 months ago
1997
ACM
With the increasing performance and density of VLSI circuits as well as the popularity of portable devices such as personal digital assistance, power consumption has emerged as an...
DSD
2004
IEEE
13 years 9 months ago
2004
IEEE
Low power VLSI circuit design is one of the most important issues in present day technology. One of the ways of reducing power in a CMOS circuit is to reduce the number of transit...
GLVLSI
2002
IEEE
13 years 10 months ago
2002
IEEE
We present a low-power sine-output Direct Digital Frequency Synthesizer (DDFS) realized in 0.18 µm CMOS that achieves 60 dBc spectral purity from DC to the Nyquist frequency. No ...
ISLPED
1999
ACM
13 years 9 months ago
1999
ACM
The use of dual threshold voltages can significantly reduce the static power dissipated in CMOS VLSI circuits. With the supply voltage at 1V and threshold voltage as low as 0.2V ...