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DDECS
2009
IEEE
146views Hardware» more  DDECS 2009»
13 years 9 months ago
Enhanced LEON3 core for superscalar processing
Low power consumption and high-performance are two main directions in the development of modern microprocessor architectures. In general they are two excluding branches of System-o...
Krzysztof Marcinek, Arkadiusz W. Luczyk, Witold A....
LCTRTS
2009
Springer
14 years 8 days ago
Guaranteeing instruction fetch behavior with a lookahead instruction fetch engine (LIFE)
Instruction fetch behavior has been shown to be very regular and predictable, even for diverse application areas. In this work, we propose the Lookahead Instruction Fetch Engine (...
Stephen Roderick Hines, Yuval Peress, Peter Gavin,...
IEEEPACT
2000
IEEE
13 years 10 months ago
A Lightweight Algorithm for Dynamic If-Conversion during Dynamic Optimization
Dynamic Optimization is an umbrella term that refers to any optimization of software that is performed after the initial compile time. It is a complementary optimization opportuni...
Kim M. Hazelwood, Thomas M. Conte
ICCAD
2009
IEEE
131views Hardware» more  ICCAD 2009»
13 years 3 months ago
Scheduling with soft constraints
In a behavioral synthesis system, a typical approach used to guide the scheduler is to impose hard constraints on the relative timing between operations considering performance, a...
Jason Cong, Bin Liu, Zhiru Zhang
BMCBI
2010
218views more  BMCBI 2010»
13 years 5 months ago
Fast multi-core based multimodal registration of 2D cross-sections and 3D datasets
Background: Solving bioinformatics tasks often requires extensive computational power. Recent trends in processor architecture combine multiple cores into a single chip to improve...
Michael Scharfe, Rainer Pielot, Falk Schreiber