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» Low power implementation of high throughput FIR filters
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ASPDAC
1998
ACM
81views Hardware» more  ASPDAC 1998»
13 years 9 months ago
Low Power Realization of FIR Filters Implemented using Distributed Arithmetic
Mahesh Mehendale, Amit Sinha, Sunil D. Sherlekar
SBCCI
2009
ACM
187views VLSI» more  SBCCI 2009»
13 years 10 months ago
Design of low complexity digital FIR filters
The multiplication of a variable by multiple constants, i.e., the multiple constant multiplications (MCM), has been a central operation and performance bottleneck in many applicat...
Levent Aksoy, Diego Jaccottet, Eduardo Costa
ISCAS
2003
IEEE
126views Hardware» more  ISCAS 2003»
13 years 10 months ago
Low power block based FIR filtering cores
— The authors present a number of complete cores which are specially tailored for the low power implementation of FIR filters executed using block processing. The paper reveals t...
Ahmet T. Erdogan, Tughrul Arslan
ISLPED
2000
ACM
111views Hardware» more  ISLPED 2000»
13 years 10 months ago
Low power techniques and design tradeoffs in adaptive FIR filtering for PRML read channels
In this paper, we describe area and power reduction techniques for a low-latency adaptive finite-impulse response filter for magnetic recording read channel applications. Variou...
Khurram Muhammad, Robert B. Staszewski, Poras T. B...
ERSA
2006
99views Hardware» more  ERSA 2006»
13 years 6 months ago
Low Power Programmable FIR Filtering IP Cores Targeting System-on-a-Reprogrammable-Chip (SoRC)
- This paper presents the design and implementation methodology of some low power programmable FIR filtering IP cores targeting SoRC and compares their performance in term of area,...
Muhammad Akhtar Khan, Abdul Hameed, Ahmet T. Erdog...