14 search results - page 1 / 3 » Low power microarchitecture with instruction reuse |
CF
2008
ACM
13 years 6 months ago
2008
ACM
Power consumption has become a very important metric and challenging research topic in the design of microprocessors in the recent years. The goal of this work is to improve power...
DATE
2003
IEEE
13 years 10 months ago
2003
IEEE
Instruction reuse is a microarchitectural technique that improves the execution time of a program by removing redundant computations at run-time. Although this is the job of an op...
HPCA
2006
IEEE
14 years 4 months ago
2006
IEEE
Building processors with large instruction windows has been proposed as a mechanism for overcoming the memory wall, but finding a feasible and implementable design has been an elu...
IEEEPACT
2002
IEEE
13 years 9 months ago
2002
IEEE
Clustering is an effective microarchitectural technique for reducing the impact of wire delays, the complexity, and the power requirements of microprocessors. In this work, we inv...
VLSID
2008
IEEE
14 years 5 months ago
2008
IEEE
Today's customizable processors allow the designer to augment the base processor with custom accelerators. By choosing appropriate set of accelerators, designer can significa...